Memory device with a common source line masking circuit



The disclosure relates to a memory device with a common source line masking circuit. The memory device comprises: a plurality of memory tiles, each tile comprising a local common source line (CSL) plate, a plurality of bit lines and a plurality of word lines, each coupled to a plurality of memory cells; and a masking circuit, coupled to each of the memory tiles, for controlling whether to raise the local CSL plate and the plurality of bit lines based on the a global common source line.




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    Publication numberPublication dateAssigneeTitle